Rainbow-electronics AT89LS8252 Manuel d'utilisateur

AT89LS82524-1378-Bit Microcontrollerwith 8K Bytes FlashAT89LS8252 Features•Compatible with MCS-51™Products•8K Bytes of In-System Reprogrammable Downlo

AT89LS82524-146Timer 0 and 1Timer 0 and Timer 1 in the AT89LS8252 operate the sameway as Timer 0 and Timer 1 in the AT89C51, AT89C52 andAT89C55. For f

AT89LS82524-147Figure 2 shows Timer 2 automatically counting up whenDCEN = 0. In this mode, two options are selected by bitEXEN2 in T2CON. If EXEN2 =

AT89LS82524-148Figure 3. Timer 2 Auto Reload Mode (DCEN = 1)Figure 4. Timer 2 in Baud Rate Generator ModeOSCSMOD1RCLKTCLKRxCLOCKTxCLOCKT2EX PINT2 PI

AT89LS82524-149Baud Rate GeneratorTimer 2 is selected as the baud rate generator by settingTCLK and/or RCLK in T2CON (Table 2). Note that the baudrate

AT89LS82524-150Programmable Clock OutA 50% duty cycle clock can be programmed to come out onP1.0, as shown in Figure 5. This pin, besides being a regu

AT89LS82524-151The interconnection between master and slave CPUs withSPI is shown in the following figure. The SCK pin is theclock output in the maste

AT89LS82524-152InterruptsThe AT89LS8252 has a total of six interrupt vectors: twoexternal interrupts (INT0 and INT1), three timer interrupts(Timers 0,

AT89LS82524-153Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier that can be configured for

AT89LS82524-154Program Memory Lock BitsThe AT89LS8252 has three lock bits that can be left unpro-grammed (U) or can be programmed (P) to obtain the ad

AT89LS82524-1557. To verify the byte just programmed, bring pin P2.7 to “L” and read the programmed data at pins P0.0 to P0.7.8. Repeat steps 3 throug

AT89LS82524-138Pin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As anoutput port, each pin can s

AT89LS82524-156Instruction SetNotes: 1. DATA polling is used to indicate the end of a write cycle which typically takes less than 10 ms at 2.7V.2. “aa

AT89LS82524-157Flash and EEPROM Parallel Programming ModesNotes: 1. “h” = weakly pulled “High” internally.2. Chip Erase and Serial Programming Fuse re

AT89LS82524-158Figure 14. Programming the Flash/EEPROM MemoryP1P2.6P3.6P2.0 - P2.5A0-A7ADDR.0000H/27FFHSEE FLASHPROGRAMMINGMODES TABLE3-12 MHzA8 - A13

AT89LS82524-159Flash Programming and Verification Characteristics - Parallel ModeTA = 0°C to 70°C, VCC = 5.0V ± 10%Symbol Parameter Min Max UnitsVPPPr

AT89LS82524-160Flash/EEPROM Programming and Verification Waveforms - Parallel ModeSerial Downloading Waveforms

AT89LS82524-161Absolute Maximum Ratings*Operating Temperature...-55°C to +125°C*NOTICE: Stresses beyond those listed under “Absolut

AT89LS82524-162AC Characteristics Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other

AT89LS82524-163External Program Memory Read CycleExternal Data Memory Read Cycle

AT89LS82524-164External Data Memory Write CycleExternal Clock Drive WaveformsExternal Clock DriveSymbol ParameterVCC = 2.7V to 6.0VUnitsMin Max1/tCLCL

AT89LS82524-165Serial Port Timing: Shift Register Mode Test ConditionsThe values in this table are valid for VCC = 2.7V to 6V and Load Capacitance = 8

AT89LS82524-139Block DiagramPORT 2 DRIVERSPORT 2LATCHP2.0 - P2.7FLASHPORT 0LATCHRAMEEPROMPROGRAMADDRESSREGISTERBUFFERPCINCREMENTERPROGRAMCOUNTERDPTRIN

AT89LS82524-166AT89LS8252TYPICAL ICC (ACTIVE) at 25°C0481216202404 8 12 16 20 24F (MHz)V = 6.0VCCV = 5.0VCCV = 3.0VCCICCmA051015203.0V4.0V 5.0V 6.0VIC

AT89LS82524-167Ordering InformationSpeed(MHz)PowerSupplyOrdering Code Package Operation Range12 2.7V to 6.0V AT89LS8252-12ACAT89LS8252-12JCAT89LS8252-

AT89LS82524-140Pin DescriptionFurthermore, P1.4, P1.5, P1.6, and P1.7 can be configuredas the SPI slave port select, data input/output and shiftclock

AT89LS82524-141XTAL1Input to the inverting oscillator amplifier and input to theinternal clock operating circuit. XTAL2Output from the inverting oscil

AT89LS82524-142User software should not write 1s to these unlisted loca-tions, since they may be used in future products to invokenew features. In tha

AT89LS82524-143Dual Data Pointer Registers To facilitate accessing bothinternal EEPROM and external data memory, two banks of16 bit Data Pointer Regis

AT89LS82524-144Table 4. SPCR—SPI Control RegisterSPCR Address = D5H Reset Value = 0000 01XXBSPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0Bit76543210Symbol Fu

AT89LS82524-145Data Memory—EEPROM and RAMThe AT89LS8252 implements 2K bytes of on-chipEEPROM for data storage and 256 bytes of RAM. Theupper 128 bytes