1Features• Low-voltage and Standard-voltage Operation–2.7(VCC=2.7Vto5.5V)–1.8(VCC=1.8Vto3.6V)• Internally Organized 16,384 x 8 and 32,768 x 8• 2-wire
10AT24C128/2560670H–SEEPR–07/02ReadOperationsRead operations are initiated the same way as write operations with the exception that theread/write sele
11AT24C128/2560670H–SEEPR–07/02Figure 3. Page WriteNotes: (* = DON’TCAREbit)(† =DON’T CARE bit for the 128K)Figure 4. Current Address ReadFigure 5. Ra
12AT24C128/2560670H–SEEPR–07/02Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characterist
13AT24C128/2560670H–SEEPR–07/02Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characterist
14AT24C128/2560670H–SEEPR–07/02Packaging Information8P3 – PDIP2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 8P3, 8-lead, 0.300" W
15AT24C128/2560670H–SEEPR–07/028S1 – JEDEC SOIC 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. Note:10/10/018S1, 8-lead (0.150"
16AT24C128/2560670H–SEEPR–07/028S2 – EIAJ SOIC2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 8S2, 8-lead, 0.209" Body, Plastic Sma
17AT24C128/2560670H–SEEPR–07/028U1 – dBGA2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 8U1, 8-ball 0.75 pitch, Die Ball Grid ArrayPack
18AT24C128/2560670H–SEEPR–07/028U6 – dBGA2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 8U6, 8-ball 0.75 pitch, Die Ball Grid ArrayPack
19AT24C128/2560670H–SEEPR–07/028A2 – TSSOP2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 5/30/02COMMON DIMENSIONS(Unit of Measure = mm)
2AT24C128/2560670H–SEEPR–07/02Block DiagramAbsolute Maximum Ratings*Operating Temperature ... -55°Cto+125°C*NOTICE: Str
20AT24C128/2560670H–SEEPR–07/0214A2–TSSOP2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 12/28/0114A2,14-lead (4.4 x 5 mm Body), 0.65 Pi
Printed on recycled paper.0670H–SEEPR–07/02 xM© Atmel Corporation 2002.Atmel Corporation makes no warranty for the use of its products, other than tho
3AT24C128/2560670H–SEEPR–07/02Pin Description SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into eachEEPROM device and negativ
4AT24C128/2560670H–SEEPR–07/02Pin Capacitance(1)Note: 1. This parameter is characterized and is not 100% tested.DC Characteristics(1)Note: 1. VILmin a
5AT24C128/2560670H–SEEPR–07/02AC CharacteristicsNotes: 1. This parameter is characterized and is not 100% tested.2. AC measurement conditions:RL(conne
6AT24C128/2560670H–SEEPR–07/02DeviceOperationCLOCK and DATA TRANSITIONS: TheSDApinisnormallypulledhighwithanexternaldevice. Data on the SDA pin may ch
7AT24C128/2560670H–SEEPR–07/02Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O)Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)Note: 1.
8AT24C128/2560670H–SEEPR–07/02Data ValidityStart and Stop DefinitionOutput Acknowledge
9AT24C128/2560670H–SEEPR–07/02DeviceAddressingThe 128K/256K EEPROM requires an 8-bit device address word following a start condition toenable the chip
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