Rainbow-electronics ADC10D040 Manuel d'utilisateur

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ADC10D040
Dual 10-Bit, 40 MSPS, 267 mW A/D Converter
General Description
The ADC10D040 is a dual low power, high performance
CMOS analog-to-digital converter that digitizes signals to 10
bits resolution at sampling rates up to 45 MSPS while con-
suming a typical 267 mW from a single 3.3V supply. No
missing codes is guaranteed over the full operating tempera-
ture range. The unique two stage architecture achieves 9.4
Effective Bits over the entire Nyquist band at 40 MHz sample
rate. An output formatting choice of straight binary or 2’s
complement coding and a choice of two gain settings eases
the interface to many systems. Also allowing great flexibility
of use is a selectable 10-bit multiplexed or 20-bit parallel
output mode. An offset correction feature minimizes the off-
set error.
To ease interfacing to most low voltage systems, the digital
output power pins of the ADC10D040 can be tied to a
separate supply voltage of 1.5V to 3.6V, making the outputs
compatible with other low voltage systems. When not con-
verting, power consumption can be reduced by pulling the
PD (Power Down) pin high, placing the converter into a low
power state where it typically consumes less than 1 mW and
from which recovery is less than 1 ms. Bringing the STBY
(Standby) pin high places the converter into a standby mode
where power consumption is about 30 mW and from which
recovery is 800 ns.
The ADC10D040’s speed, resolution and single supply op-
eration make it well suited for a variety of applications,
including high speed portable applications.
Operating over the industrial (−40˚ T
A
+85˚C) tempera-
ture range, the ADC10D040 is available in a 48-pin TQFP. An
evaluation board is available to ease the design effort.
Features
n Internal sample-and-hold
n Internal Reference Capability
n Dual gain settings
n Offset correction
n Selectable straight binary or 2’s complement output
n Multiplexed or parallel output bus
n Single +3.0V to 3.6V operation
n Power down and standby modes
n 3V TTL Logic input/output compatible
Key Specifications
n Resolution 10 Bits
n Conversion Rate 40 MSPS
n ENOB 9.4 Bits (typ)
n DNL 0.35 LSB (typ)
n Conversion Latency Parallel Outputs 2.5 Clock Cycles
— Multiplexed Outputs, I Data Bus 2.5 Clock Cycles
— Multiplexed Outputs, Q Data Bus 3 Clock Cycles
n PSRR 90 dB
n Power Consumption Normal Operation 267 mW (typ)
— Power Down Mode
<
1 mW (typ)
— Fast Recovery Standby Mode 30 mW (typ)
Applications
n Digital Video
n CCD Imaging
n Portable Instrumentation
n Communications
n Medical Imaging
n Ultrasound
September 2003
ADC10D040 Dual 10-Bit, 40 MSPS, 267 mW A/D Converter
© 2003 National Semiconductor Corporation DS200297 www.national.com
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Résumé du contenu

Page 1 - ADC10D040

ADC10D040Dual 10-Bit, 40 MSPS, 267 mW A/D ConverterGeneral DescriptionThe ADC10D040 is a dual low power, high performanceCMOS analog-to-digital conver

Page 2 - Ordering Information

AC Electrical Characteristics OS = High (Parallel Mode)The following specifications apply for VA=VD= +3.3 VDC,VDR= +2.5VDC,VREF= 1.4 VDC, GAIN = OF =

Page 3 - Block Diagram

AC Electrical Characteristics OS = High (Parallel Mode) (Continued)20029706Note 8: Typical figures are at TJ= 25˚C, and represent most likely parametr

Page 4

Timing Diagrams20029708ADC10D040 Timing Diagram for Multiplexed Mode20029707ADC10D040 Timing Diagram for Parallel ModeADC10D040www.national.com 12

Page 5

Timing Diagrams (Continued)20029709FIGURE 1. AC Test CircuitADC10D040www.national.com13

Page 6

Specification DefinitionsAPERTURE (SAMPLING) DELAY is that time required afterthe fall of the clock input for the sampling switch to open. TheSample/H

Page 7

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, fCLK= 40 MHz, fIN= 10.4 MHz,unless otherwise specifiedTypical INL INL vs. VA20029782200297

Page 8

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, fCLK= 40 MHz, fIN= 10.4 MHz,unless otherwise specified (Continued)Typical DNL DNL vs. VA20

Page 9

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, fCLK= 40 MHz, fIN= 10.4 MHz,unless otherwise specified (Continued)DNL vs. Clock Duty Cycle

Page 10

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, fCLK= 40 MHz, fIN= 10.4 MHz,unless otherwise specified (Continued)SNR, SINAD & SFDR vs

Page 11

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, fCLK= 40 MHz, fIN= 10.4 MHz,unless otherwise specified (Continued)Total Power vs. TEMP Spe

Page 12 - Timing Diagrams

Connection Diagram20029701TOP VIEWOrdering InformationIndustrial Temperature Range(−40˚C ≤ TA≤ +85˚C)NS PackageADC10D040CIVS TQFPADC10D040EVAL Evaluat

Page 13 - Timing Diagrams (Continued)

Functional DescriptionUsing a subranging architecture, the ADC10D040 achieves9.4 effective bits over the entire Nyquist band at 40 MSPSwhile consuming

Page 14 - Specification Definitions

Applications Information (Continued)variability. The reference voltage at the VREFpin should bebypassed to AGND witha5µF(orlarger) tantalum orelectrol

Page 15

Applications Information (Continued)20029772FIGURE 5. Improved Low Component Count Reference BiasingADC10D040www.national.com 22

Page 16

Applications Information (Continued)20029773FIGURE 6. Setting An Accurate Reference VoltageADC10D040www.national.com23

Page 17

Applications Information (Continued)The VCMOoutput can be used as the ADC reference sourceas long as care is taken to prevent excessive loading of thi

Page 18

Applications Information (Continued)2.2 VCMOOutputThe VCMOoutput pin is intended to provide a common modebias for the differential input pins of the A

Page 19

Applications Information (Continued)TABLE 1. ADC10D040 Input/Output RelationshipsGAIN OF I+ / Q+ I− / Q− Output Code00VCM+ 0.25*VREFVCM− 0.25*VREF11 1

Page 20 - Applications Information

Applications Information (Continued)7.0 DYNAMIC PERFORMANCEThe ADC10D040 is a.c. tested and its dynamic performanceis guaranteed. To meet the publishe

Page 21

Physical Dimensions inches (millimeters) unless otherwise notedNOTES UNLESS OTHERWISE SPECIFIED1. STANDARD LEAD FINISH7.62 MICROMETERS MINIMUM SOLDER

Page 22

Block Diagram20029702Pin Descriptions and Equivalent CircuitsPin No. Symbol Equivalent Circuit Description4847I+I−Analog inputs to “I” ADC. With VREF=

Page 23

Pin Descriptions and Equivalent Circuits (Continued)Pin No. Symbol Equivalent Circuit Description45 VCMOThis is an analog output which can be used as

Page 24

Pin Descriptions and Equivalent Circuits (Continued)Pin No. Symbol Equivalent Circuit Description33 CLKDigital clock input for both converters. The an

Page 25

Pin Descriptions and Equivalent Circuits (Continued)Pin No. Symbol Equivalent Circuit Description4VDDigital supply pin. This pin should be connected t

Page 26

Absolute Maximum Ratings (Notes 1,2)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distri

Page 27

Converter Electrical Characteristics (Continued)The following specifications apply for VA=VD= +3.3 VDC,VDR= +2.5 VDC,VREF= 1.4 VDC, GAIN = OF = 0V, OS

Page 28 - 48-Lead TQFP Package

Converter Electrical Characteristics (Continued)The following specifications apply for VA=VD= +3.3 VDC,VDR= +2.5 VDC,VREF= 1.4 VDC, GAIN = OF = 0V, OS

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