Rainbow-electronics AT89LP214 Manuel d'utilisateur télécharger pdf (Page 80)

3538A–MICRO–7/06

AT89LP213/214 [Preliminary]

Figure 24-6. Shift Register Mode Timing Waveform

24.6 Test Conditions

24.6.1 AC Testing Input/Output Waveform

(1)

Note: 1. AC Inputs during testing are driven at V

- 0.5V for a logic “1” and 0.45V for a logic “0”. Timing measurements are made at

min. for a logic “1” and V

max. for a logic “0”.

24.6.2 Float Waveform

(1)

Note: 1. For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to

float when 100 mV change from the loaded V

level occurs.

24.5 Serial Port Timing: Shift Register Mode Test Conditions

The values in this table are valid for V

= 2.4V to 5.5V and Load Capacitance = 80 pF.

Symbol Parameter

Variable Oscillator

UnitsMin Max

XLXL

Serial Port Clock Cycle Time 2t

CLCL

-15 µs

QVXH

Output Data Setup to Clock Rising Edge t

CLCL

-15 ns

XHQX

Output Data Hold after Clock Rising Edge t

CLCL

-15 ns

XHDX

Input Data Hold after Clock Rising Edge 0 ns

XHDV

Input Data Valid to Clock Rising Edge 15 ns

01234567

VALIDVALIDVALIDVALID VALID VALID VALID VALID

CLOCK

WRITE TO SBUF

OUTPUT DATA

CLEAR RI

INPUT DATA

1 2 ... 75 76 77 78 79 80 81 82 83 84 85 ... 89 90

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