Rainbow-electronics ATR0635P1 Manuel d'utilisateur Page 1

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Features
16-channel GPS Correlator
8192 Search Bins with GPS Acquisition Accelerator
Accuracy: 2.5m CEP (2D, Stand Alone)
Time to First Fix: 34s (Cold Start)
Acquisition Sensitivity: –142 dBm (Cold Start, With External LNA)
Tracking Sensitivity: –158 dBm (With External LNA)
Utilizes the ARM7TDMI
®
ARM
®
Thumb
®
Processor Core
High-performance 32-bit RISC Architecture
EmbeddedICE
(In-Circuit Emulation)
128 Kbytes Internal RAM
384 Kbytes Internal ROM with u-blox GPS Firmware SuperSense
®
1.5-bit ADC On-chip
Single IF Architecture
2 External Interrupts
24 User-programmable I/O Lines
1 USB Device Port
Universal Serial Bus (USB) 2.0 Full-speed Device
Embedded USB V2.0 Full-speed Transceiver
2 USARTs
Master/Slave SPI Interface
4 External Slave Chip Selects
Programmable Watchdog Timer
Advanced Power Management Controller (APMC)
Geared Master Clock to Reduce Power Consumption
Sleep State with Disabled Master Clock
Hibernate State with 32.768 kHz Master Clock
Real Time Clock (RTC)
1.8V to 3.3V User-definable IO Voltage for Several GPIOs with 5V Tolerance
4 KBytes of Battery Backup Memory
7 mm × 10 mm 96 Pin BGA Package, 0.8 mm Pitch, Pb-free, RoHS-compliant
Benefits
Fully Integrated Design With Low BOM
No External Flash Memory Required
Supports NMEA
®
, UBX Binary and RTCM Protocol for DGPS
Supports SBAS (WAAS, EGNOS, MSAS)
Up to 4 Hz Update Rate
Supports A-GPS (Aiding)
Excellent Noise Performance
ANTARIS4
Single-chip
GPS Receiver
SuperSense
ATR0635P1
Automotive
4979D–GPS–06/08
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Résumé du contenu

Page 1 - Benefits

Features• 16-channel GPS Correlator – 8192 Search Bins with GPS Acquisition Accelerator– Accuracy: 2.5m CEP (2D, Stand Alone)– Time to First Fix: 34s

Page 2

104979D–GPS–06/08ATR0635P1Boot SectionC6 BOOT_MODE DIGITAL IN - Leave open, internal pull downReset A7 NRESET DIGITAL IN Low Reset input; open drai

Page 3

114979D–GPS–06/08ATR0635P1Active Antenna SupervisionC8 NANTSHORT DIGITAL IN Low Active antenna short detection InputG5, G6 NAADET0/NAADET1DIGITAL IN

Page 4

124979D–GPS–06/08ATR0635P13.3 Setting GPSMODE0 to GPSMODE12The start-up configuration of this ROM-based system without external non-volatile memory is

Page 5

134979D–GPS–06/08ATR0635P13.3.2 Sensitivity SettingsFor all GPS receivers the sensitivity depends on the integration time of the GPS signals. There-fo

Page 6

144979D–GPS–06/08ATR0635P1Both USART ports accept input messages in all three supported protocols (NMEA, RTCM andUBX) at the configured baud rate. Inp

Page 7

154979D–GPS–06/08ATR0635P1The following settings apply if GPSMODE configuration is not enabled, that is, GPSMODE = 0(ROM defaults):3.4.1 USB Power Mod

Page 8

164979D–GPS–06/08ATR0635P1The Antenna Supervisor Software will be configured as follows:1. Enable Control Signal2. Enable Short Circuit Detection (pow

Page 9

174979D–GPS–06/08ATR0635P13.4.3 External Connections for a Working GPS SystemFigure 3-2. Example of an External Connection (ATR0635P1) ATR0635P1see Ta

Page 10 - ATR0635P1

184979D–GPS–06/08ATR0635P1Table 3-15. Recommended Pin ConnectionsPin Name Recommended External CircuitP0/NANTSHORT Internal pull-down resistor; leave

Page 11

194979D–GPS–06/08ATR0635P13.5 Connecting an Optional Serial EEPROMThe ATR0635P1 offers the possibility of connecting an external serial EEPROM. The in

Page 12

24979D–GPS–06/08ATR0635P11. DescriptionThe ATR0635P1 is a low-power, single-chip GPS receiver, especially designed to meet therequirements of mobile a

Page 13

204979D–GPS–06/08ATR0635P14. Power SupplyThe ATR0635P1 is supplied with six distinct supply voltages:• The power supplies for the RF part (VCC1, VCC2,

Page 14

214979D–GPS–06/08ATR0635P1Figure 4-1. Connecting Example: Separate Power Supplies for RF and Digital Part Using the Internal LDOs The ATR0635P1 contai

Page 15

224979D–GPS–06/08ATR0635P1The RTC section will be initialized properly if VDD18 is supplied first to the ATR0635P1. If VBATis applied first, the curre

Page 16

234979D–GPS–06/08ATR0635P1Figure 4-3. Connecting Example: Separate Power Supplies for RF and Digital Part Using 1.8V from Host System ATR0635P1 intern

Page 17

244979D–GPS–06/08ATR0635P1Figure 4-4. Connecting Example: Power Supply from USB Using the Internal LDOs ATR0635P1 internalVDDUSB1.5V to 3.6Vldooutldoe

Page 18

254979D–GPS–06/08ATR0635P15. CrystalsThe ATR0635P1 requires a GPS TCXO. The reference frequency is 23.104 MHz. By connectingan optional RTC crystal, d

Page 19

264979D–GPS–06/08ATR0635P15.2 RTC OscillatorFigure 5-3. Crystal Connection Table 5-1. Specification of GPS TCXOs Appropriate for the Application Examp

Page 20

274979D–GPS–06/08ATR0635P17. HandlingThe ATR0635P1 is an ESD-sensitive device. The current ESD values are to be defined.Observe proper precautions for

Page 21

284979D–GPS–06/08ATR0635P19. Operating RangeParameters Pins Symbol Min Typ Max UnitAnalog supply voltage RF VCC1, VCC2, VBP VCC2.70 3.30 VDigital supp

Page 22

294979D–GPS–06/08ATR0635P12.4 AGC cut-off frequency Cext = open A4 f3dB_AGC250 kHz D2.5 AGC cut-off frequency Cext = 100 pF A4 f3dB_AGC33 kHz D3PMSS3.

Page 23

34979D–GPS–06/08ATR0635P12. Architectural Overview2.1 Block DiagramFigure 2-1. ATR0635P1 Block Diagram NSLEEPNSHDNXT_INTMSTCKTDOTDINTRSTDBG_ENP25/NAAD

Page 24

304979D–GPS–06/08ATR0635P16.7 Schmitt trigger hysteresis VDD18 = 1.65V to 1.95V CLK23 Vhyst,CLK230.2 0.55 V C6.8Schmitt trigger threshold risingVDD18

Page 25

314979D–GPS–06/08ATR0635P16.26Input pull-up resistor NRESETA7 RPU0.5 1.8 kΩ A6.27Input pull-up resistors TCK, TDI, TMSG9, H10, G10RPU718kΩ A6.28Input

Page 26

324979D–GPS–06/08ATR0635P111. Power ConsumptionTable 11-1. Leakage CurrentsParameter Conditions Typ. Max. Unit Type*Leakage current VDD18VDD18 = 1.95V

Page 27

334979D–GPS–06/08ATR0635P113. Package Information 12. Ordering InformationExtended Type Number Package MPQ RemarksATR0635P1-7KQY BGA96 30007mm× 10 mm,

Page 28

344979D–GPS–06/08ATR0635P114. Revision HistoryPlease note that the following page numbers referred to in this section refer to the specific revision m

Page 29

4979D–GPS–06/08Headquarters InternationalAtmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600Atmel AsiaR

Page 30

44979D–GPS–06/08ATR0635P12.2 General DescriptionThe ATR0635P1 has been designed especially for mobile applications. It provides high isolationbetween

Page 31

54979D–GPS–06/08ATR0635P12.7 Analog-to-digital Converter The analog-to-digital converter stage has a total resolution of 1.5 bits. It comprises balanc

Page 32

64979D–GPS–06/08ATR0635P13. Pin Configuration3.1 PinoutFigure 3-1. Pinning BGA96 (Top View) Table 3-1. ATR0635P1 Pinout Pin Name BGA 96 Pin TypePull R

Page 33

74979D–GPS–06/08ATR0635P1GNDA B4 SupplyGNDA D2 SupplyGNDA E1 SupplyGNDA E2 SupplyGNDA E3 SupplyGNDA F1 SupplyGNDA F2 SupplyGNDA F3 SupplyGNDA G1 Suppl

Page 34

84979D–GPS–06/08ATR0635P1P20 G7 Digital I/O Configurable (PD) TIMEPULSE SCK2 SCK2P21 E6 Digital I/O Configurable (PU) TXD2 TXD2P22 D10 Digital I/O PU

Page 35

94979D–GPS–06/08ATR0635P13.2 Signal DescriptionVDD_USB(3)A10 SupplyVDD18 H9 SupplyVDD18 G11 SupplyVDD18 F12 SupplyVDD18 B9 SupplyVDD18 E5 SupplyVDDIO(

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