MAX5953A/MAX5953B/MAX5953C/MAX5953D
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (DC-DC Controller) (continued)
(All voltages referenced to GND, unless otherwise noted. V
HVIN
= +48V, C
INBIAS
= 1µF, C
REGOUT
= 2.2µF, R
RTCT
= 25kΩ, C
RTCT
=
100pF, C
BST
= 0.22µF, V
CSS
= V
CS
= 0V, V
RAMP
= V
DCUVLO
= 3V, T
J
= 0°C to +125°C, unless otherwise noted. Typical values are at
T
J
= +25°C, unless otherwise noted.) (Note 1)
µA
Total Gate Charge Per Power
FET
15 nC
HIGH-SIDE DRIVER
Low to High Latency t
LH-HS
Driver delay until FET V
GS
reaches 0.9 x
(V
BST
- V
XFRMRH
) and is fully on
80 ns
High to Low Latency t
HL-HS
Driver delay until FET V
GS
reaches 0.1 x
(V
BST
- V
XFRMRH
) and is fully off
40 ns
Output Drive Voltage V
BST
BST to XFRMRH with high side on 8 V
LOW-SIDE DRIVER
Low to High Latency t
LH-LS
Driver delay until FET V
GS
reaches 0.9 x
V
DRVIN
and is fully on
80 ns
High to Low Latency t
HL-LS
Driver delay until FET V
GS
reaches 0.1 x
V
DRVIN
and is fully off
40 ns
CURRENT-LIMIT COMPARATOR (CS)
Current-Limit Threshold
Voltage
V
ILIM
t
dILIM
From V
CS
rising (10mV overdrive) to
V
XFRMRL
rising
160 ns
BOOST VOLTAGE CIRCUIT (See Figure 9, QB)
Driver Output Delay t
PPWMD
200 ns
One-Shot Pulse Width t
PWQB
300 ns
QB R
DSON
Sinking 20mA 30 60 Ω
THERMAL SHUTDOWN
Shutdown Temperature T
SH
Temperature rising
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