Rainbow-electronics ATF1502ASL Manuel d'utilisateur

1Features• High-density, High-performance, Electrically-erasable Complex ProgrammableLogic Device– 32 Macrocells– 5 Product Terms per Macrocell, Expan

10ATF1502AS(L)0995J–PLD–09/02PCI Compliance The ATF1502AS also supports the growing need in the industry to support the new PeripheralComponent Interc

11ATF1502AS(L)0995J–PLD–09/02Note: 1. Leakage current is with pin-keeper off.Notes: 1. Equation A: IOH=11.9(VOUT- 5.25) * (VOUT+ 2.45) for VCC>VOUT

12ATF1502AS(L)0995J–PLD–09/02Power-downModeThe ATF1502AS includes an optional pin-controlled power-down feature. When this mode isenabled, the PD pin

13ATF1502AS(L)0995J–PLD–09/02Notes: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.2

14ATF1502AS(L)0995J–PLD–09/02Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.The OGI pin (hi

15ATF1502AS(L)0995J–PLD–09/02AC Characteristics(1)Symbol Parameter-7 -10 -15 -25UnitsMin Max Min Max Min Max Min MaxtPD1Input or Feedback to Non-regis

16ATF1502AS(L)0995J–PLD–09/02Notes: 1. See ordering information for valid part numbers.2. The tRPAparameter must be added to the tLAD,tLAC,tTIC,tACL,a

17ATF1502AS(L)0995J–PLD–09/02SUPPLY CURRENT VS. SUPPLY VOLTAGEAS VERSION (TA= 25°C, F = 0)0102030405060704.5 4.75 5 5.25 5.5VCC(V)ICC(mA)STANDARD POWE

18ATF1502AS(L)0995J–PLD–09/02INPUT CLAMP CURRENT VS. INPUT VOLTAGE(VCC=5V,TA= 25°C)-60-50-40-30-20-100-1.00 -0.80 -0.60 -0.40 -0.20 0.00INPUT VOLTAGE

19ATF1502AS(L)0995J–PLD–09/02NORMALIZED TCOVS. SUPPLY VOLTAGE (TA=25°C)0.80.91.01.11.24.5 4.8 5.0 5.3 5.5SUPPLY VOLTAGE (V)NORMALIZED TPDNORMALIZED TS

2ATF1502AS(L)0995J–PLD–09/0244-lead TQFPTop View44-lead PLCCTop ViewDescription The ATF1502AS is a high-performance, high-density complex programmable

20ATF1502AS(L)0995J–PLD–09/02OE (1, 2) Global OE pinsGCLR Global Clear pinGCLK (1, 2, 3) Global Clock pinsPD (1, 2) Power-down pinsTDI, TMS, TCK, TDO

21ATF1502AS(L)0995J–PLD–09/02ATF1502AS I/O PinoutsMC PLC 44-lead PLCC 44-lead TQFP1A4422A5433A/PD1 6444/TDI A715A826A937A1158A1269/TMS A13710 A 14 811

22ATF1502AS(L)0995J–PLD–09/02Using “C” Product for IndustrialTo use commercial product for industrial temperature ranges, down-grade one speed grade f

23ATF1502AS(L)0995J–PLD–09/02Packaging Information44A – TQFP 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. 44A, 44-lead, 10 x 10 mm

24ATF1502AS(L)0995J–PLD–09/0244J–PLCCNotes: 1. This package conforms to JEDEC reference MS-018, Variation AC. 2. Dimensions D1 and E1 do not include m

Printed on recycled paper.© Atmel Corporation 2002.Atmel Corporation makes no warranty for the use of its products, other than those expressly contain

3ATF1502AS(L)0995J–PLD–09/02Block DiagramEach of the 32 macrocells generates a buried feedback that goes to the global bus. Each inputand I/O pin also

4ATF1502AS(L)0995J–PLD–09/02Figure 1. ATF1502AS MacrocellProduct Terms andSelect MuxEach ATF1502AS macrocell has five product terms. Each product term

5ATF1502AS(L)0995J–PLD–09/02The clock itself can be either one of the Global CLK signals (GCK[0 : 2]) or an individual prod-uct term. The flip-flop ch

6ATF1502AS(L)0995J–PLD–09/02Input DiagramI/O DiagramSpeed/PowerManagementThe ATF1502AS has several built-in speed and power management features. TheAT

7ATF1502AS(L)0995J–PLD–09/02All pin transitions are ignored until the PD pin is brought low. When the power-down feature isenabled, the PD1 or PD2 pin

8ATF1502AS(L)0995J–PLD–09/02Atmel provides ISP hardware and software to allow programming of the ATF1502AS via thePC. ISP is performed by using either

9ATF1502AS(L)0995J–PLD–09/02JTAGBoundary-scanCell (BSC)TestingThe ATF1502AS contains up to 32 I/O pins and four input pins, depending on the device ty