
11
AT90S/LS4433
1042G–AVR–09/02
In the different addressing modes, these address registers have functions as fixed dis-
placement, automatic increment and decrement (see the descriptions for the different
instructions).
ALU – Arithmetic Logic
Unit
The high-performance AVR ALU operates in direct connection with all the 32 general
purpose working registers. Within a single clock cycle, ALU operations between regis-
ters in the Register File are executed. The ALU operations are divided into three main
categories: arithmetic, logical, and bit functions.
In-System
Programmable Flash
Program Memory
The AT90S4433 contains 4K bytes of On-chip, In-System Programmable Flash memory
for program storage. Since all instructions are 16- or 32-bit words, the Flash is orga-
nized as 2K x 16. The Flash memory has an endurance of at least 1,000 write/erase
cycles. The AT90S4433 Program Counter (PC) is 11 bits wide, thus addressing the
2,048 program memory addresses. See page 93 for a detailed description of Flash data
downloading. See page 12 for the different program memory addressing modes.
Figure 9. SRAM Organization
SRAM Data Memory Figure 9 shows how the AT90S4433 SRAM memory is organized.
The lower 224 data memory locations address the Register File, the I/O memory and
the internal data SRAM. The first 96 locations address the Register File and I/O mem-
ory, and the next 128 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Dis-
placement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In
the Register File, registers R26 to R31 feature the indirect addressing pointer registers.
Register File Data Address Space
R0 $0000
R1 $0001
R2 $0002
º º
R29 $001D
R30 $001E
R31 $001F
I/O Registers
$00 $0020
$01 $0021
$02 $0022
……
$3D $005D
$3E $005E
$3F $005F
Internal SRAM
$0060
$0061
º
$00DE
$00DF
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