Rainbow-electronics ATmega128RFA1 Manuel d'utilisateur Page 272

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272
8266A-MCU Wireless-12/09
ATmega128RFA1
The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT1). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC1A pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.
Bit 7:0 – OCR1AL7:0 - Timer/Counter1 Output Compare Register Low Byte
18.11.8 OCR1BH – Timer/Counter1 Output Compare Register B High Byte
Bit 7 6 5 4 3 2 1 0
NA ($8B) OCR1BH7:0 OCR1BH
Read/Write RW RW RW RW RW RW RW RW
Initial Value 0 0 0 0 0 0 0 0
The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT1). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC1B pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.
Bit 7:0 – OCR1BH7:0 - Timer/Counter1 Output Compare Register High Byte
18.11.9 OCR1BL – Timer/Counter1 Output Compare Register B Low Byte
Bit 7 6 5 4 3 2 1 0
NA ($8A) OCR1BL7:0 OCR1BL
Read/Write R RW RW RW RW RW RW RW
Initial Value 0 0 0 0 0 0 0 0
The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT1). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC1B pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.
Bit 7:0 – OCR1BL7:0 - Timer/Counter1 Output Compare Register Low Byte
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