Rainbow-electronics ATmega64M1 Manuel d'utilisateur Page 252

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252
8209A–AVR–08/09
ATmega16M1/32M1/64M1
These 2 bits determine the gain of the amplifier 2.
The different setting are shown in Table 22-12.
To ensure an accurate result, after the gain value has been changed, the amplifier input needs
to have a quite stable input value during at least 4 Amplifier synchronization clock periods.
Bit 3 – AMPCMP2: Amplifier 2 - Comparator 2 connection
Set this bit to connect the amplifier 2 to the comparator 2 positive input. In this configuration the
comparator clock is adapted to the amplifier clock and AMP2TS2,AMP2TS1, AMP2TS0 bits
have no effect.
Clear this bit to normally use the Amplifier 2.
Bit 2:0 – AMP2TS[2:0]: Amplifier 2 Clock Source Selection Bits
In accordance with the Table 22-13, these 3 bits select the event which will generate the clock
for the amplifier 1. This clock source is necessary to start the conversion on the amplified
channel.
Table 22-12. Amplifier 2 Gain Selection
AMP2G[1:0] Description
00 Gain 5
01 Gain 10
10 Gain 20
11 Gain 40
Table 22-13. AMP1 Clock Source Selection
AMP2TS[2:0] Clock Source
000 ADC Clock/8
001 Timer/Counter0 Compare Match
010 Timer/Counter0 Overflow
011 Timer/Counter1 Compare Match B
100 Timer/Counter1 Overflow
101 PSC Module 0 Synchronization Signal (PSS0)
110 PSC Module 1 Synchronization Signal (PSS1)
111 PSC Module 2 Synchronization Signal (PSS2)
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