Rainbow-electronics ATmega8HVD Manuel d'utilisateur Page 154

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154
8052B–AVR–09/08
ATmega4HVD/8HVD
Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
should never be written.
2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
isters, the value of single bits can be checked by using the SBIS and SBIC instructions.
3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on
all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
4. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O regis-
ters as data space using LD and ST instructions, $20 must be added to these addresses. The ATmega4HVD/8HVD is a
complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the
IN and OUT instructions. For the Extended I/O space from $60 - $FF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used.
0x1B (0x3B) Reserved
0x1A (0x3A) Reserved
0x19 (0x39) Reserved
0x18 (0x38) Reserved
0x17 (0x37) OSICSR –OSISEL0 OSIST OSIEN
0x16 (0x36) TIFR1
ICF1 OCF1B OCF1A TOV1
0x15 (0x35) TIFR0
ICF0 OCF0B OCF0A TOV0
0x14 (0x34) Reserved
0x13 (0x33) Reserved
0x12 (0x32) Reserved
0x11 (0x31) Reserved
0x10 (0x30) Reserved
0x0F (0x2F) Reserved
0x0E (0x2E) Reserved
0x0D (0x2D) Reserved
0x0C (0x2C) Reserved
0x0B (0x2B) Reserved
0x0A (0x2A) Reserved
0x09 (0x29) Reserved
0x08 (0x28) PORTC PORTC1 PORTC0
0x07 (0x27) Reserved
0x06 (0x26) PINC PINC1 PINC0
0x05 (0x25) PORTB PORTB2 PORTB1 PORTB0
0x04 (0x24) DDRB DDB2 DDB1 DDB0
0x03 (0x23) PINB PINB2 PINB1 PINB0
0x02 (0x22) Reserved
0x01 (0x21) Reserved
0x00 (0x20) Reserved
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
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