
70
8052B–AVR–09/08
ATmega4HVD/8HVD
14.4 Register Description
14.4.1 MCUCR – MCU Control Register
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
”Configuring the Pin” on page 62 for more details about this feature.
14.4.2 PORTB – Port B Data Register
14.4.3 DDRB – Port B Data Direction Register
14.4.4 PINB – Port B Input Pins Address
Bit 7 6 5 4 3 2 1 0
– – CKOE PUD – – – – MCUCR
Read/Write R R R/W R/W R R R R
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
-----PORTB2PORTB1PORTB0PORTB
Read/WriteRRRRRR/WR/WR/W
Initial Value00000000
Bit 76543210
----
- DDB2 DDB1 DDB0 DDRB
Read/WriteRRRRRR/WR/WR/W
Initial Value00000000
Bit 76543210
----
- PINB2 PINB1 PINB0 PINB
Read/WriteRRRRRRRR
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A
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