
14
ATmega8515(L)
2512A–AVR–04/02
AVR ATmega8515
Memories
Thissection describes the different memories in the ATmega8515. The AVR architec-
ture has twomainmemory spaces, the Data Memory and theProgram Memory space.
Inaddition, the ATmega8515 features an EEPROM Memory fordata storage. All three
memory spaces are linear andregular.
In-System
Reprogrammable Flash
Program Memory
The ATmega8515 contains 8KbytesOn-chipIn-System Reprogrammable Flash mem-
ory forprogram storage. Sinceall AVR instructions are16 or32 bitswide, the Flash is
organized as 4Kx16. Forsoftware security, the Flash Program memory spaceis
divided into two sections, Boot Program section and Application Program section.
The Flash memory has an enduranceof at least1,000 write/erase cycles.The
ATmega8515 Program Counter(PC) is 12 bitswide, thus addressing the4Kprogram
memory locations.Theoperation ofBoot Program section and associatedBoot Lock
bitsforsoftware protection are described in detail in “Boot LoaderSupport–Read-
While-Write Self-Programming” on page 162. “Memory Programming” on page 175 con-
tains a detaileddescription on Flash data serialdownloading using the SPIpins.
Constant tablescan beallocatedwithin the entireProgram memory address space,see
the LPM – Load Program Memory instruction description.
Timing diagramsfor instruction fetch and execution are presented in “Instruction Execu-
tion Timing” on page 11.
Figure 8. Program Memory Map
$000
$FFF
Application Flash Section
Boot Flash Section
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