Rainbow-electronics ATmega8515L Manuel d'utilisateur Page 59

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59
ATmega8515(L)
2512A–AVR–04/02
signal transition on the pin will be delayedbetween ½ and system clock period
depending upon thetimeof assertion.
When reading back a softwareassignedpin value, a
nop
instruction must beinserted as
indicated in Figure 31. The
out
instruction sets the“SYNC LATCH signal at the positive
edge of the clock. Inthiscase, the delay t
pd
through the synchronizer is one system
clock period.
Figure 31. Synchronization when Reading a SoftwareAssigned Pin Value
out PORTx, r16 nop in r17, PINx
0xFF
0x00 0xFF
SYSTEM CLK
r16
INSTRUCTIONS
SYNC LATCH
PINxn
r17
t
pd
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