Rainbow-electronics Atmega169L Manuel d'utilisateur télécharger pdf (Page 60)

ATmega169V/L

2514A–AVR–08/02

• SCK/PCINT9 – Port B, Bit 1

SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is

enabled as a Slave, this pin is configured as an input regardless of the setting of DDB1.

When the SPI is enabled as a Master, the data direction of this pin is controlled by

DDB1. When the pin is forced to be an input, the pull-up can still be controlled by the

PORTB1 bit.

PCINT9, Pin Change Interrupt Source 9: The PB1 pin can serve as an external interrupt

source.

• SS

/PCINT8 – Port B, Bit 0

: Slave Port Select input. When the SPI is enabled as a Slave, this pin is configured

as an input regardless of the setting of DDB0. As a Slave, the SPI is activated when this

pin is driven low. When the SPI is enabled as a Master, the data direction of this pin is

controlled by DDB0. When the pin is forced to be an input, the pull-up can still be con-

trolled by the PORTB0 bit

PCINT8, Pin Change Interrupt Source 8: The PB0 pin can serve as an external interrupt

source.

Table 30 and Table 31 relate the alternate functions of Port B to the overriding signals

shown in Figure 25 on page 55. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute

the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE

INPUT.

Table 30. Overriding Signals for Alternate Functions in PB7..PB4

Signal

Name

PB7/OC2A/

PCINT15

PB6/OC1B/

PCINT14

PB5/OC1A/

PCINT13

PB4/OC0A/

PCINT12

PUOE 0 0 0 0

PUOV 0 0 0 0

DDOE 0 0 0 0

DDOV 0 0 0 0

PVOE OC2A ENABLE OC1B ENABLE OC1A ENABLE OC0A ENABLE

PVOV OC2A OC1B OC1A OC0A

PTOE –– – –

DIEOE PCINT15 •

PCIE1

PCINT14 • PCIE1 PCINT13 • PCIE1 PCINT12 •

PCIE1

DIEOV 1 1 1 1

DI PCINT15 INPUT PCINT14 INPUT PCINT13 INPUT PCINT12 INPUT

AIO –– – –

1 2 ... 55 56 57 58 59 60 61 62 63 64 65 ... 316 317

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Rainbow-electronics Atmega169L Manuel d'utilisateur Page 60

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