
70
ATmega169V/L
2514A–AVR–08/02
• SEG4 – Port G, Bit 2
SEG4, LCD front plane 4
• SEG13 – Port G, Bit 1
SEG13, Segment driver 13
• SEG14 – Port G, Bit 0
SEG14, LCD front plane 14
Table 44 and Table 45 relates the alternate functions of Port G to the overriding signals
shown in Figure 25 on page 55.
Note: 1. When the RSTDISBL Fuse is “0” (programmed).
Table 45. Overriding Signals for Alternate Functions in PG5:4
Signal
Name PG5/RESET PG4/T0/SEG23
PUOE 1 LCDEN • (LCDPM>5)
PUOV 1 0
DDOE 0 LCDEN • (LCDPM>5)
DDOV 0 1
PVOE 0 0
PVOV 0 0
PTOE ––– –
DIEOE RSTDISBL
(1)
LCDEN • (LCDPM>5)
DIEOV 1 0
DI – T0 INPUT
AIO RESET INPUT SEG23
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