Rainbow-electronics Atmega169L Manuel d'utilisateur télécharger pdf (Page 77)

ATmega169V/L

2514A–AVR–08/02

• Bit 0 – INTF0: External Interrupt Flag 0

When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0

becomes set (one). If the I-bit in SREG and the INT0 bit in EIMSK are set (one), the

MCU will jump to the corresponding Interrupt Vector. The flag is cleared when the inter-

rupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to

it. This flag is always cleared when INT0 is configured as a level interrupt.

Pin Change Mask Register 1 –

PCMSK1

• Bit 7..0 – PCINT15..8: Pin Change Enable Mask 15..8

Each PCINT15..8-bit selects whether pin change interrupt is enabled on the correspond-

ing I/O pin. If PCINT15..8 is set and the PCIE1 bit in EIMSK is set, pin change interrupt

is enabled on the corresponding I/O pin. If PCINT15..8 is cleared, pin change interrupt

on the corresponding I/O pin is disabled.

Pin Change Mask Register 0 –

PCMSK0

• Bit 7..0 – PCINT7..0: Pin Change Enable Mask 7..0

Each PCINT7..0 bit selects whether pin change interrupt is enabled on the correspond-

ing I/O pin. If PCINT7..0 is set and the PCIE0 bit in EIMSK is set, pin change interrupt is

enabled on the corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on

the corresponding I/O pin is disabled.

Bit 76543210

PCINT15 PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8 PCMSK1

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

InitialValue00000000

Bit 76543210

PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 PCMSK0

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

InitialValue00000000

1 2 ... 72 73 74 75 76 77 78 79 80 81 82 ... 316 317

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Rainbow-electronics Atmega169L Manuel d'utilisateur Page 77