Rainbow-electronics ATmega64C1 Manuel d'utilisateur télécharger pdf (Page 20)

7647A–AVR–02/08

ATmega32/64/M1/C1

4. Memories

This section describes the different memories in the ATmega32/64/M1/C1. The AVR architec-

ture has two main memory spaces, the Data Memory and the Program Memory space. In

addition, the ATmega32/64/M1/C1 features an EEPROM Memory for data storage. All three

memory spaces are linear and regular.

4.1 In-System Reprogrammable Flash Program Memory

The ATmega32/64/M1/C1 contains 32K/64K bytes On-chip In-System Reprogrammable Flash

memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-

nized as 16K x 16 / 32K x 16. For software security, the Flash Program memory space is divided

into two sections, Boot Program section and Application Program section.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The

ATmega32/64/M1/C1 Program Counter (PC) is 14/15 bits wide, thus addressing the 16K/32K

program memory locations. The operation of Boot Program section and associated Boot Lock

bits for software protection are described in detail in “Boot Loader Support – Read-While-Write

Self-Programming ATmega32/64M1” on page 272. “Memory Programming” on page 289 con-

tains a detailed description on Flash programming in SPI or Parallel programming mode.

Constant tables can be allocated within the entire program memory address space (see the LPM

– Load Program Memory.

Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-

ing” on page 16.

Figure 1. Program Memory Map

4.2 SRAM Data Memory

Figure 2 shows how the ATmega32/64/M1/C1 SRAM Memory is organized.

0x0000

0x3FFF/0x7FFF

Program Memory

Application Flash Section

Boot Flash Section

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 ... 365 366

Pas de commentaire

Rainbow-electronics ATmega64C1 Manuel d'utilisateur Page 20