Rainbow-electronics ATmega64C1 Manuel d'utilisateur Page 259

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259
7647A–AVR–02/08
ATmega32/64/M1/C1
Figure 20-1. Analog Comparator Block Diagram
(1)(2)
Notes: 1. ADC multiplexer output: see Table 18-5 on page 243.
2. Refer to Figure 1-1 on page 3 and for Analog Comparator pin placement.
3. The voltage on Vref is defined in 18-4 “ADC Voltage Reference Selection” on page 242
20.3 Use of ADC Amplifiers
Thanks to AMPCMP0 configuration bit, Comparator 0 positive input can be connected to Ampli-
fier O output. In that case, the clock of comparator 0 is adapted to the amplifier 0 clock. See
“Amplifier 0 Control and Status register – AMP0CSR” on page 251.
Thanks to AMPCMP1 configuration bit, Comparator 1 positive input can be connected to Ampli-
fier 1 output. In that case, the clock of comparator 1 is adapted to the amplifier 1 clock. See
“Amplifier 1 Control and Status register – AMP1CSR” on page 252.
Thanks to AMPCMP2 configuration bit, Comparator 2 positive input can be connected to Ampli-
fier 2 output. In that case, the clock of comparator 2 is adapted to the amplifier 2 clock. See
“Amplifier 1 Control and Status register – AMP1CSR” on page 252.
+
-
Interrupt Sensitivity Control
Analog Comparator 0 Interrupt
AC0IE
AC0IF
AC0O
AC0IS1 AC0IS0
+
-
Interrupt Sensitivity Control
Analog Comparator 1 Interrupt
AC1IE
T1 Capture Trigger
AC1ICE
AC1IF
AC1O
AC1IS1 AC1IS0
+
-
Interrupt Sensitivity Control
Analog Comparator 2 Interrupt
AC2IE
AC2IF
AC2O
AC2IS1 AC2IS0
ACMP0
ACMPN0
ACMP1
ACMP2
AC2EN
/3.20
/2.13
/1.60
/6.40
AMP2
AC0M
2 1 0
DAC
Result
AC1EN
AC0EN
AC1M
2 1 0
AC2M
2 1 0
CLK
I/O
CLK
I/O
CLK
I/O
(/2)
(/2)
(/2)
Internal 2.56V
Reference
REFS1
REFS0
Aref
AVcc
ACMPN1
ACMPN2
+
-
Interrupt Sensitivity Control
Analog Comparator 3 Interrupt
AC3IE
AC3IF
AC3O
AC3IS1 AC3IS0
ACMP3
AC3EN
AC3M
2 1 0
CLK
I/O
(/2)
ACMPN3
+
-
AMPCMP2
AMP0
+
-
AMPCMP0
AMP1
+
-
AMPCMP1
AMPCMP0
AMPCMP1
AMPCMP2
ADC
ADC
ADC
Bandgap
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