Rainbow-electronics ATmega64C1 Manuel d'utilisateur télécharger pdf (Page 242)

242

7647A–AVR–02/08

ATmega32/64/M1/C1

• Bit 7, 6 – REFS1, 0: ADC Vref Selection Bits

These 2 bits determine the voltage reference for the ADC.

The different setting are shown in Table 18-4.

If bits REFS1 and REFS0 are changed during a conversion, the change will not take effect until

this conversion is complete (it means while the ADIF bit in ADCSRA register is set).

In case the internal Vref is selected, it is turned ON as soon as an analog feature needed it is

set.

• Bit 5 – ADLAR: ADC Left Adjust Result

Set this bit to left adjust the ADC result.

Clear it to right adjust the ADC result.

The ADLAR bit affects the configuration of the ADC result data registers. Changing this bit

affects the ADC data registers immediately regardless of any on going conversion. For a com-

plete description of this bit, see Section “ADC Result Data Registers – ADCH and ADCL”,

page 245.

Read/Write R/W R/W R/W - R/W R/W R/W R/W

Initial Value 0 0 0 0 0 0 0 0

Table 18-4. ADC Voltage Reference Selection

AREFEN ISRCEN REFS1 REFS0 Description

1 0 0 0 External Vref on AREF pin, Internal Vref is switched off

1 0 0 1 AVcc with external capacitor connected on the AREF pin

0 0 0 1 AVcc (no external capacitor connected on the AREF pin)

1010Reserved

1011

Internal 2.56V Reference voltage with external capacitor

connected on the AREF pin

0 x 1 1 Internal 2.56V Reference voltage

1 2 ... 237 238 239 240 241 242 243 244 245 246 247 ... 365 366

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Rainbow-electronics ATmega64C1 Manuel d'utilisateur Page 242